.TH "src/process/decode/decode.h" 3 "Thu Oct 11 2012" "Version 1.0" "Dissasemble" \" -*- nroff -*-
.ad l
.nh
.SH NAME
src/process/decode/decode.h \- 
.SH SYNOPSIS
.br
.PP
\fC#include <config\&.h>\fP
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\fC#include <debug\&.h>\fP
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\fC#include <elf\&.h>\fP
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\fC#include <gelf\&.h>\fP
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\fC#include <libelf\&.h>\fP
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\fC#include <err\&.h>\fP
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\fC#include <fcntl\&.h>\fP
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\fC#include <stdio\&.h>\fP
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\fC#include <stdlib\&.h>\fP
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\fC#include <unistd\&.h>\fP
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\fC#include <assert\&.h>\fP
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\fC#include <common\&.h>\fP
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.SS "Data Structures"

.in +1c
.ti -1c
.RI "struct \fB_reg_values\fP"
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.RI "\fIStructure containing the attributes of the different types of records\&. \fP"
.ti -1c
.RI "struct \fB_optional\fP"
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.RI "\fIOptional Atributes\&. \fP"
.ti -1c
.RI "struct \fB_displacement\fP"
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.RI "\fIDisplacement Atributes\&. \fP"
.ti -1c
.RI "struct \fB_inmediate\fP"
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.RI "\fIInmediate Atributes\&. \fP"
.in -1c
.SS "Defines"

.in +1c
.ti -1c
.RI "#define \fBTWO_BYTE_OPCODE\fP   (0x0F)"
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.ti -1c
.RI "#define \fBREG_TO_MEM\fP   0"
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.ti -1c
.RI "#define \fBMEM_TO_REG\fP   1"
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.ti -1c
.RI "#define \fBOPERAND_SIZE_8\fP   0"
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.ti -1c
.RI "#define \fBOPERAND_SIZE_16_32\fP   1"
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.ti -1c
.RI "#define \fBMAX_OPERAND_NUMBER\fP   4"
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.RI "\fILists the different instruction sizes\&. \fP"
.in -1c
.SS "Typedefs"

.in +1c
.ti -1c
.RI "typedef struct \fB_reg_values\fP \fBREG_VALUES\fP"
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.ti -1c
.RI "typedef union \fB_optional\fP \fBOPTIONAL\fP"
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.ti -1c
.RI "typedef struct \fB_displacement\fP \fBDISPLACEMENT\fP"
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.ti -1c
.RI "typedef struct \fB_inmediate\fP \fBINMEDIATE\fP"
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.in -1c
.SS "Enumerations"

.in +1c
.ti -1c
.RI "enum \fBINST_DATA_SIZE\fP { \fBSIZE_8\fP =  8, \fBSIZE_16\fP = 16, \fBSIZE_32\fP = 32, \fBSIZE_64\fP = 64 }"
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.in -1c
.SS "Functions"

.in +1c
.ti -1c
.RI "char \fBdecode\fP (char *buf, \fBUINT8\fP *decodedSize, \fBMACHINE_INSTRUCTION\fP *instructionDecoded)"
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.RI "\fIState machine that controls the disassembly process\&. \fP"
.in -1c
.SH "Define Documentation"
.PP 
.SS "#define \fBMAX_OPERAND_NUMBER\fP   4"
.PP
Lists the different instruction sizes\&. 
.SS "#define \fBMEM_TO_REG\fP   1"
.SS "#define \fBOPERAND_SIZE_16_32\fP   1"
.SS "#define \fBOPERAND_SIZE_8\fP   0"
.SS "#define \fBREG_TO_MEM\fP   0"
.SS "#define \fBTWO_BYTE_OPCODE\fP   (0x0F)"
.SH "Typedef Documentation"
.PP 
.SS "typedef struct \fB_displacement\fP  \fBDISPLACEMENT\fP"
.SS "typedef struct \fB_inmediate\fP  \fBINMEDIATE\fP"
.SS "typedef union \fB_optional\fP  \fBOPTIONAL\fP"
.SS "typedef struct \fB_reg_values\fP  \fBREG_VALUES\fP"
.SH "Enumeration Type Documentation"
.PP 
.SS "enum \fBINST_DATA_SIZE\fP"
.PP
\fBEnumerator: \fP
.in +1c
.TP
\fB\fISIZE_8 \fP\fP
.TP
\fB\fISIZE_16 \fP\fP
.TP
\fB\fISIZE_32 \fP\fP
.TP
\fB\fISIZE_64 \fP\fP

.SH "Function Documentation"
.PP 
.SS "char \fBdecode\fP (char *buf, \fBUINT8\fP *decodedSize, \fBMACHINE_INSTRUCTION\fP *instructionDecoded)"
.PP
State machine that controls the disassembly process\&. \fBParameters:\fP
.RS 4
\fIbuf\fP Buffer containing the piece of the file to be analyzed 
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\fIdecodedSize\fP Size of the instruction to be decoded 
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\fIinstructionDecoded\fP Object containing the attibutes of the decoded instruction 
.RE
.PP

.SH "Author"
.PP 
Generated automatically by Doxygen for Dissasemble from the source code\&.
